Before an AI chip enters mass production, one practical question has to be answered: how will it be tested?
Even after the compute core and package have been designed, the test interface still has to work reliably with high-speed signals, large numbers of contacts, and heavy thermal loads. Unstable contact or signal distortion at the interface can make test results a poor reflection of the chip’s actual performance. These conditions shape test socket design and give suppliers a reason to join development before mass production begins.
From WinWay’s test interfaces to MediaTek’s collaboration with NVIDIA on custom chips, a common feature of these supplier relationships emerges: some suppliers establish their role during design and validation. Competition therefore extends to their ability to solve engineering problems together with customers, and to the systems their products will ultimately join.
Why Do Test Sockets Need to Enter the Design Process Early?
WinWay is a Taiwanese supplier of semiconductor test interfaces. A test socket connects a packaged chip to test equipment and must accommodate the chip’s contact layout, signal requirements, and thermal conditions during testing. Changes to the chip or package may require this interface to be redesigned as well.
WinWay chairman Mark Wang has said that testing has become an important part of product development, requiring early participation in specification design. WinWay’s engineering services cover simulation, mechanical design, and thermal solutions, and the company has built teams for signal integrity and power integrity simulation. For customers, this means test requirements can be discussed alongside package and product specifications, instead of being addressed only before shipment.
The solutions WinWay announced in 2024 included a 224 Gbps coaxial test socket and high-power thermal management products. Jason Chen, senior vice president of global business operations, said WinWay continued to work with IC design and custom-chip customers on joint development. These products and descriptions of collaboration illustrate an engineering role in which the test interface must address electrical, mechanical, and thermal requirements together.
Figure 1. WinWay’s coaxial spring-pin test socket, with its dense array of openings and metal frame visible from the front.
Image source: WinWay, coaxial spring-pin test socket product page, original product photograph.
Early engineering work also involves commercial arrangements. NRE, or non-recurring engineering, generally refers to a one-time engineering development fee for a specific project. It may cover design, simulation, or validation; the actual scope of work and subsequent supply depend on the individual arrangement. In analyzing a supply chain, the questions worth asking are when a supplier becomes involved, what problem it solves, and whether its work passes customer validation.
How Does Joint Problem-Solving Change a Supplier’s Position?
A test socket supplier that can offer design recommendations before the package is finalized has an opportunity to influence how the interface is implemented. Its work becomes connected to the customer’s development schedule: which signals need simulation, how contacts maintain reliable connections, and how heat is removed from the test area all have to match the product’s requirements.
This also offers a way to assess the depth of a collaboration. If changing suppliers means adapting the mechanical design, repeating electrical simulations, or confirming test conditions, procurement decisions must account for that engineering work and the time it requires. The size of the effect depends on whether the product is customized, whether the design can be transferred, and whether alternatives have already been validated.
Early involvement does not guarantee long-term orders. The package, power consumption, and signal requirements of the next chip generation may change, and existing solutions will need to be evaluated again. Taiwanese suppliers’ ability to remain in the development process still depends on the engineering results they deliver for each generation.
MediaTek and NVIDIA: Which Platform Will Custom Chips Join?
MediaTek’s collaboration with NVIDIA operates at another level. It addresses how custom compute chips connect to a larger AI system.
On August 31, 2026, the two companies announced an expanded partnership. NVIDIA’s announcement explicitly stated that it had invested in US$3.5 billion of convertible bonds issued by MediaTek. MediaTek would adopt the NVLink Fusion platform to help customers integrate custom compute chips into rack-scale AI systems connected by NVLink. The collaboration builds on an existing relationship: MediaTek was already listed among the initial partners when NVIDIA introduced NVLink Fusion in 2025.
Custom chips are commonly called ASICs, or application-specific integrated circuits. After designing their own compute cores, customers still have to address data interconnects, memory, packaging, and system integration. SerDes, the interface for transmitting and receiving high-speed serial data, is one of the engineering capabilities involved. MediaTek’s role along this path is to connect custom-chip design with the integration work that follows.
NVLink Fusion provides a route into NVIDIA systems. Johnny Shen, Alchip’s chairman and president, has argued that cloud providers would need considerable time to build an inter-chip interconnect platform from scratch. Adopting an existing solution can reduce development risk and accelerate progress.
For customers, this is a system-level choice: how much differentiation to retain in the compute core, and which interconnect and integration tasks to entrust to an existing platform. For MediaTek, the engineering value also extends to whether the chip can work with the surrounding technologies. Completing and validating that work creates the conditions for moving toward actual deployment.
Figure 2. NVIDIA’s NVLink Fusion deployment configurations. The middle column connects a custom CPU through NVLink-C2C, while the right column integrates a custom accelerator through NVLink.
Image source: NVIDIA Technical Blog, Integrating Semi-Custom Compute into Rack-Scale Architecture with NVIDIA NVLink Fusion, original Figure 2.
Capital, Joint Engineering, and Platforms Solve Different Problems
Capital partnerships, joint engineering, and platform integration can work together within the same supplier relationship, while serving different purposes.
NVIDIA’s purchase of MediaTek’s convertible bonds is a financing collaboration that has already taken place. Its effects on products will depend on subsequent progress in design, validation, and manufacturing. Joint engineering brings suppliers into the work of adapting products, as illustrated by WinWay’s test interfaces. Platform integration addresses system compatibility, with MediaTek and NVIDIA’s NVLink Fusion collaboration offering another path.
Taiwan’s Opportunity Depends on the Next Generation of Engineering Results
WinWay and MediaTek play different roles, but they point to the same industry question: can suppliers turn a customer’s design into a solution that can be validated and integrated before mass production begins?
For Taiwanese companies, this capability can extend collaboration into earlier stages of product development. It may also increase dependence on a particular customer’s specifications or platform roadmap. Whether the engineering work can be reused across generations or support other customers will affect the long-term value of the relationship.
Three developments are worth watching: whether a solution completes customer validation; whether the next product generation continues to use or build on those capabilities; and whether the collaboration reaches actual mass production and adoption by multiple customers. Investment amounts and technology partnership announcements provide a starting point. These subsequent results reveal the supplier’s actual position.
Some of the competition in the AI supply chain is already taking place before procurement for mass production. For Taiwanese companies, the ability to solve problems involving signals, heat, packaging, and system interfaces at that stage will be an important clue to their industrial value.
Sources
- Wei Shengfeng, “Global Giants Play the Taiwan Card in the Battle for Resources and Market Position,” Wealth Invest Weekly, issue 2425.
- Lin Yuanqing, “The World’s Largest Test Socket Supplier: Three WinWay Advantages Attract Major US Companies,” Wealth Magazine, issue 747.
- Huang Yiyun, “What Is NVIDIA’s Latest AI Interconnect Technology, NVLink Fusion? Jensen Huang’s Decade of Preparation, with Alchip and MediaTek Named as Partners,” CommonWealth Magazine, included in issue 825. Article.
- WinWay, “WinWay Launches Four Advanced Testing Solutions for the AI Chip Era,” September 5, 2024. Company announcement.
- NVIDIA, “NVIDIA Unveils NVLink Fusion for Industry to Build Semi-Custom AI Infrastructure With NVIDIA Partner Ecosystem,” May 18, 2025. Company announcement.
- NVIDIA, “NVIDIA and MediaTek Deepen Long-Standing Partnership to Build AI Edge to Cloud Computing Platforms,” August 31, 2026. Company announcement.
- WinWay, “Coaxial Spring-Pin Test Socket.” Product information and original image.
- Joe DeLaere and Ivan Goldwasser, “Integrating Semi-Custom Compute into Rack-Scale Architecture with NVIDIA NVLink Fusion,” NVIDIA Technical Blog. Technical article and original Figure 2.